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ADP3611
Power and Thermal Considerations
The major power consumption of the ADP3611-based
driver circuit is from the dissipation of MOSFET gate
charge. It can be estimated as
Part of this power consumption generates heat inside the
ADP3611. The temperature rise of the ADP3611 against its
environment is estimated as
P MAX [ VCC
(Q HSGATE ) Q LSGATE )
f MAX
(eq. 3)
D T [ q JA
P MAX
h
(eq. 4)
where:
V CC is the supply voltage 5 V.
f MAX is the highest switching frequency.
Q HSGATE and Q LSGATE are the total gate charge of
high-side and low-side MOSFETs, respectively.
For example, the ADP3611 drives two NTMFS4821N
high-side MOSFETs and two NTMFS4846N low-side
MOSFETs. According to the MOSFET data sheets,
Q HSGATE = 20 nC and Q LSGATE = 40 nC. Given that f MAX
is 300 kHz, P MAX would be about 90 mW.
where q JA is ADP3611’s thermal resistance from junction
to air, given in the absolute maximum ratings as 220 ° C/W
for a 4 layer board.
The total MOSFET drive power dissipates in the output
resistance of ADP3611 and in the MOSFET gate resistance
as well. h represents the ratio of power dissipation inside
the ADP3611 over the total MOSFET gate driving power.
For normal applications, a rough estimation for h is 0.7. A
more accurate estimation can be calculated using
h [
Q HSGATE
Q HSGATE ) Q LSGATE
0.5 R1
R1 ) R HSGATE ) R
)
0.5 R2
R2 ) R HSGATE
(eq. 5)
Q LSGATE
Q HSGATE ) Q LSGATE
0.5 R3
R3 ) R LSGATE
)
0.5 R4
R4 ) R LSGATE
R BST C BST
where:
R1 and R2 are the output resistances of the high-side driver:
R1 = 1.7 (DRVH ? BST), R2 = 0.8 (DRVH ? SW).
R3 and R4 are the output resistances of the low-side driver:
R3 = 1.7 (DRVL ? VCC), R4 = 0.8 (DRVL ? GND).
R is the external resistor between the BST pin and the BST
capacitor.
R HSGATE and R LSGATE are gate resistances of high-side and
low-side MOSFETs, respectively.
Assuming that R = 0 and that R HSGATE = R LSGATE = 0.5,
Equation 5 gives a value of h = 0.71. Based on Equation 4,
the estimated temperature rise in this example is about
22 ° C.
PC Board Layout Considerations
Use the following general guidelines when designing
printed circuit boards. Figure 19 gives an example of the
typical land patterns based on the guidelines given here.
? The VCC bypass capacitor should be located as close
as possible to the VCC and GND pins. Place the
ADP3611 and bypass capacitor on the same layer of
the board, so that the PCB trace between the ADP3611
VCC pin and the MLC capacitor does not contain any
via. An ideal location for the bypass MLC capacitor is
near Pin 5 and Pin 6 of the ADP3611.
? High frequency switching noise can be coupled into
the VCC pin of the ADP3611 via the BST diode.
Therefore, do not connect the anode of the BST diode
to the VCC pin with a short trace. Use a separate via
? It is best to have the low-side MOSFET gate close to
the DRVL pin; otherwise, use a short and very thick
PCB trace between the DRVL pin and the low-side
MOSFET gate.
? Fast switching of the high-side MOSFET can reduce
switching loss. However, EMI problems can arise due
to the severe ringing of the switch node voltage.
Depending on the character of the low-side MOSFET,
a very fast turn-on of the high-side MOSFET may
falsely turn on the low-side MOSFET through the
dv/dt coupling of its Miller capacitance. Therefore,
when fast turn-on of the high-side MOSFET is not
required by the application, a resistor of about 1 W to
2 W can be placed between the BST pin and the BST
capacitor to limit the turn-on speed of the high-side
MOSFET.
To
Switch
Node
Short, Thick Trace
to the Gates of
Low ? Side MOSFETs
C VCC
Figure 19. External Component Placement Example
or trace to connect the anode of the BST diode directly
to the VCC 5 V power rail.
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